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| ts3310 page 1 ? 2013 touchstone semiconductor, inc. all rights reserved. features ? ultra - efficient boost converter: active mode , no - load supply current: 150n a efficiency: up to 92% input voltage range: 0.9v - 3.6v delivers up to 35 ma at 3v store from 1.2v in single - inductor, discontinuous conduction mode operation no external schottky diode required ? pin - selectable output v oltage s : 1.8v , 2.1v, 2.5v, 2.85v, 3 v, 3.3v, 4.1v, and 5 v ? user - enabled secondary output load switch ? 1 0 - pin, low - profile, 2 mm x 2 mm t d fn package applications coin cell - powered portable equipment single cell li - ion or alkaline powered e quipment solar or mechanical energy h arvesting wireless microphones wireless remote sensors rfid tags blood glucose meters personal health - monitoring devices zigbee radio enabled devices low - energy bluetooth radio enabled devices description the ts3310 is a low power boost switching regulator with an industry leading low quiescent current of 150na . the 150na is the actual current consumed from the battery while the output is in regulation. the ts3310s extremely low power internal circuitry consumes 90na on average, with periodic switching cycles which service the load occurring at intervals of up to 25 seconds, together yielding the average 150na. the ts3310 st eps up input voltages from 0.9v to 3.6v to eight selectable output v oltages ranging from 1.8v to 5 v . the ts3310 includes two output options, one being an always - on storage output while the additional output is an output load switch that is designed to supply burst - on loads in a low duty cycle manner . the ts3310 operates in discontinuous conduction mode with an on - time proportional to 1/v in , thereby limiting the maximum input current by the selection of the inductor value, ensuring the input current does not drag down the input source. the extremely low quiescent current combined with the output load swi tch make the ts3310 an ideal choice for applications where the load can be periodically powered from the output, while being disconnected from the output storage capacitor when the load is powered off to isolate the loads leakage current. the ts331 0 is f ully specified over the - 40c to +85c temperature range and is available in a low - profile, thermally - enhanced 1 0 - pin 2x2 mm t d fn package with an exposed back - side paddle. efficiency vs store current in=1.2v, store=3 v 0.0001 0.001 0.01 0.1 1 10 100 i store - ma 100 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 efficiency - % circuit a circuit b a true 150 - na i q , 0.9 - 3.6v in , selectable 1.8 - 5v out instant - on tm boost converter typical application circuit the touchstone semiconductor logo and nanowatt analog are registered trademarks of touchstone semiconductor, incorporated. circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f
ts3310 page 2 ts3310ds r1p1 rtfds absolute maximum rat ings in to gnd ................................ ................................ . - 0.3v to +6.0v store to gnd ................................ ........................ - 0.3v to +6.0v out to gnd ................................ ............................. - 0.3v to +6.0v lsw to gnd ................................ ............................. - 0.3v to +6.0v out_on, s0, s1, s2 to gnd ................................ ... - 0.3v to +6.0v vgood to gnd ................................ ....................... - 0.3v to +6.0v continuous power dissipation (t a = +70c) 10 - pin t d fn 22ep (derate at 13.48 mw/c above +70c) 1078 mw operating temperature range ................................ - 40c to +85c junction temperature ................................ ......................... + 1 5 0 c storage temperature range ................................ . - 65c to +150c lead temperature (s oldering, 10s) ................................ ..... +300c electrical and thermal s tresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. exposure to any absolut e maximum rating conditions for extended periods may affect device reliability and lifetime . package/ordering information order number part marking carrier quantity ts3310itd1022t aaw tape & reel ----- TS3310ITD1022TP tape & reel 3000 lead - free program: touchstone semico nductor supplies only lead - free packaging. consult touchstone semiconductor for products specified with wider operating temperature ranges. ts3310 ts3310ds r1p1 page 3 rtfds electrical character istics v in =1.2 v, v out_on = v in , vprog is the programmed voltage according to s2, s1, s0 pins set for store voltage of 3 v unless otherwise specified . t a = - 40 c to 85 c . typical values are at t a =+25 c unless otherwise specified . please see note 1. parameter symbol conditions min typ max units input voltage range v in 0.9 3.6 v under voltage lock out uvlo 0.855 0.9 v h yst eresis 20 mv store voltage v store i store =50% of i store(max) , 0.9v ts3310 page 4 ts3310ds r1p1 rtfds circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f efficiency vs store output current in= 2.4 v, store=3v 100 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 efficiency - % 0.0001 0.001 0.01 0.1 1 10 100 i store - ma typical performance characteristics efficiency vs store output current in= 1.2 v, store=3v 0.0001 0.001 0.01 0.1 1 10 100 i store - ma 100 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 efficiency - % efficiency vs store output current in= 1.2 v, store=1.8v 0.0001 0.001 0.01 0.1 1 10 100 i store - ma 100 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 efficiency - % efficiency vs store output current in=2 v, store=5v 0.0001 0.001 0.01 0.1 1 10 100 i store - ma 100 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 efficiency - % circuit a circuit b circuit a circuit b circuit a circuit b circuit a circuit b v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. ts3310 ts3310ds r1p1 page 5 rtfds active - mode i q vs input voltage with no load : circuit a (store=1.8v) input voltage - v 0.900 1.125 1.350 1.575 1.800 active - mode i q - na 800 640 480 160 0 320 active - mode i q vs input voltage with no load : circuit b (store=1.8v) input voltage - v 0.900 1.125 1.350 1.575 1.800 active - mode i q - na 800 640 480 160 0 320 circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f efficiency vs store output current in=3 v, store=5v 0.0001 0.001 0.01 0.1 1 10 100 i store - ma 100 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 efficiency - % typical performance characteristics +25 c - 40 c +85 c +25 c - 40 c +85 c v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. circuit b circuit a ts3310 page 6 ts3310ds r1p1 rtfds active - mode i q vs input voltage wit h no load : circuit b (store=3 v) input voltage - v 0.90 1.32 1.74 2.16 2.58 3.00 active - mode i q - na 800 640 480 160 0 320 active - mode i q vs input voltage with no load : circuit a (store=3 v) input voltage - v 0.90 1.32 1.74 2.16 2.58 3.00 active - mode i q - na 800 640 480 160 0 320 active - mode i q vs input voltage with no load : circuit a (store=5 v) input voltage - v 2.00 2.25 2.50 2.75 3.00 active - mode i q - na 800 640 480 160 0 320 active - mode i q vs input voltage with no load : circuit b (store=5 v) input voltage - v 2.00 2.25 2.50 2.75 3.00 active - mode i q - na 800 640 480 160 0 320 circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f typical performance characteristics +25 c - 40 c +85 c +25 c - 40 c +85 c +85 c - 40 c +25 c v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. +85 c - 40 c +25 c ts3310 ts3310ds r1p1 page 7 rtfds circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f typical performance characteristics minimum star t - up voltage vs store output current circuit a with 10 source resistance (store=1.8v) i store - ma 0.001 0.01 0.1 1 10 100 source voltage - v 1.50 1.25 1.00 0.75 0.50 minimum star t - up voltage vs store output current circuit a with 10 source resistance (store=3 v) i store - ma 0.001 0.01 0.1 1 10 100 source voltage - v 2.00 1.75 1.50 1.25 0.50 0.75 1.00 minimum star t - up voltage vs store output current circuit b with 10 source resistance (store=1.8v) source voltage - v 1.50 1.30 1.10 0.90 0.70 i store - ma 0.001 0.01 0.1 1 10 minimum start - up volt age vs store output current circuit b with 10 source resistance (store=3 v) source voltage - v 1.50 1.30 1.10 0.90 0.70 i store - ma 0.001 0.01 0.1 1 10 +85 c +25 c - 40 c +25 c - 40 c +85 c +85 c +85 c +25 c - 40 c - 40 c +25 c v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. ts3310 page 8 ts3310ds r1p1 rtfds minimum start - up voltage vs source resistance : v store =3v source voltage - v 2.0 1.5 1.0 0.5 0 source resistance - k 0 5 10 15 20 minimum start - up voltage vs source resistance : v store =1.8v source voltage - v 2.0 1.5 1.0 0.5 0 source resistance - k 0 5 10 15 20 circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f typical performance characteristics circuit b circuit a circuit a circuit b minimum star t - up voltage vs store output current circuit a with 10 source resistance (store=5v) i store - ma 0.001 0.01 0.1 1 10 100 source voltage - v 3.6 3.0 2.7 2.4 1.5 1.8 2.1 3.3 minimum start - up volt age vs store output current circuit b with 10 source resistance (store=5v) source voltage - v 3.0 2.5 2. 0 1.5 i store - ma 0.001 0.01 0.1 1 10 - 40 c - 40 c +25 c +25 c +85 c v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. +85 c ts3310 ts3310ds r1p1 page 9 rtfds circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f typical performance characteristics maximum store output current vs input voltage w/ v store 96% of target voltage : circuit b store output current - ma 11 9 7 5 3 input voltage - v 0.90 1.42 1.94 2.46 2.98 3.50 maximum store output current vs input voltage w/ v store 96% of target voltage : circuit a input voltage - v 0.90 1.42 1.94 2.46 2.98 3.50 store output current - ma 60 50 40 30 20 70 80 store=5.0v store=3.0v store=1.8v store=1.8v store=3.0v store=5.0v v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. i floor 90n a i peak 80m a/div active - mode i q : circuit a with no - load v in = 3v, store=3 v i peak 50ma /div i floor 90na active - mode i q : circuit a with no - load v in =1.2v, store=3 v 5 s/div 10 s/div ts3310 page 10 ts3310ds r1p1 rtfds circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f typical performance characteristics v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. lsw 1v/div store 50mv/div i l 100ma/div store output voltage ripple, inductor current, and lsw voltage : circuit a v in =1.2v, store=3v, i store =10ma lsw 2 v/div store 10 0mv/div i store 30ma /div i l 2 00ma/div store load step response : circuit a v in =1.2v, store=3v, i store =24ma lsw 2 v/div store 10 0mv/div i store 3.33ma /div i l 2 0ma/div store load step response : circuit b v in =1.2v, store=3v, i store =3ma lsw 5 v/div store 2 0mv/div i l 100ma/div store output voltage ripple, inductor current, and lsw voltage : circuit a v in =1.2v, store=3v, i store (max) =35ma ts3310 ts3310ds r1p1 page 11 rtfds circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f typical performance characteristics v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. lsw 5 v/div store 5 v/div v in 2v/div i l 1 00ma/div startup : circuit a with r in =10 v in = 2 v, store= 5 v, i store =10ma lsw 1 v/div store 1 v/div v in 1v/div i l 2 00ma/div startup : circuit a with r in =10 v in =1.2v, store= 1.8 v, i store =10ma lsw 1 v/div store 1 v/div v in 1v/div i l 2 00ma/div startup : circuit a with r in =10 v in = 0.9 v, store= 1.8 v, i store =0.18 a lsw 2 v/div store 5 v/div v in 2v/div i l 1 00ma/div startup : circuit a with r in =10 v in = 2 v, store= 5 v, i store =0.5 a ts3310 page 12 ts3310ds r1p1 rtfds circuit a circuit b l 10 h pn: cbc3225t100kr 100 h pn: cbc3225t101kr c in = c store 10 f 1 f typical performance characteristics v out_on =gnd, v vgood =gnd, c out =c1=c2=0.1 f, i store =0a, i out =0a unless otherwise specified. values are at t a =25 c unless otherwise specified. out_on 2 v/div store 20 0mv/div i floor 120na out 2 v/div out _on switched o ff : circuit a with c out removed v in =1.2v, store=3v, i store =0.3 a, i o ut = 3ma lsw 2 v/div store 2 v/div store switch to gnd i l 100ma/div short store to gnd for 1msec recovery : circuit a v in =1.2v, store=3v, i store =9ma out_on 2 v/div store 20 0mv/div i floor 120na out 2 v/div out _on switched on : circuit a with c out removed v in =1.2v, store=3v, i store =0.3 a, i out = 3 ma ts3310 ts3310ds r1p1 page 13 rtfds pin functions pin name function 1 out_on logic input. turns on out switch. 2 in boost input. connect to input source. 3 s0 logic input. sets the regulated voltage at store. 4 s1 logic input. sets the regulated voltage at store. 5 s2 logic input. sets the regulated voltage at store. 6 vgood open drain output. high impedance when store> 90% of regulation voltage. 7 gnd ground. connect this pin to the analog ground plane. 8 lsw inductor connection. 9 store regulated output voltage set by s0, s1, s2 logic. connect storage capacitor. 10 out switched output. block diagram ts3310 page 14 ts3310ds r1p1 rtfds theory of operation the ts33 10 is a boost switching regulator with an industry leading low quiescent current of 150 na .the 150na is the actual current consumed from the battery while the output is in regulation. the ts3310s extremely low power internal circuitry consumes 90na on average, with periodic switching cycles which service the load occurring at intervals of up to 25 seconds, as displayed in the scope capture entitled input quiescent current : ci rcuit a with no - load on page 9. the always - on output voltage at store is regulated by a comparator within the regulation control block. when a load discharges c store and causes the output voltage to dro p below the desired regulated voltage, switching periods are initiated. when the output voltage is at or above the desired regulated voltage, the comparator causes switching periods to stop. each switching cycle includes an on period and an off period. d uring the on period, the nmos switch turns on to ramp current in the inductor, while during the off period, the nmos switch turns off and the pmos switch turns on to discharge inductor current into the c store capacitor. when the on and off cycles have comp leted, the pmos switch turns off. the ts3310 operates in discontinuous conduction mode (dcm); during any given switching cycle, the inductor current starts at and returns to zero. the switching cycle timing is governed by the control block, which determine s the on and off periods according to the input and output voltages, regardless of the inductor current. the control block sets the on period according to: t n s in equation 1. on period calculation the choice of the inductor value, then, determines the peak switching currents: i pk in t n l s l equation 2. peak - current calculation the average input current, i in(avg) , will vary according to the load, since as the load is increased, the time between switching cycles is decreased. however, i in(a vg) will never exceed i in(avg,max) , the maximum averaged input current, which represents the case where switching periods are continuously initiated. i in a ma i pk 1 s l equation 3. maximum average input current calculation equation 3 shows that an input current limit can be set by choice of inductor value, set appropriately for the capacity and output impedance of the input source. maximum available output current is also a function of inductor value for the case where swi tching cycles are continuously initiated, the expected maximum store output current is : i st re ma in t i in a ma eff equation 4. expected maximum store current calculation the regulation controls within the control block monitor and control the regulation of the store output voltage. by strapping a combination of logic input pins (s0 - s2) high or low, the store output voltage can be one of 8 selectable output voltages. for 5v store output operation , a minimum v in of 2v is required . the ts3310 provides an additional instant - on switched out output that completely isolates loads from the storage capacitor at the store output . the out load switch is controlled by the logic input pin out_on . the ts3310 provides an open - drain vgood output that assumes a high i mpedance once the store output is greater than 90% of the target voltage. s2 s1 s0 store 0 0 0 1.8v 0 0 1 2.5v 0 1 0 3.3v 0 1 1 5.0v 1 0 0 2.1v 1 0 1 2.85v 1 1 0 3.0v 1 1 1 4.1v table 1. store output voltage options ts3310 ts3310ds r1p1 page 15 rtfds the ts3310 comes with an under voltage lockout (uvlo) feature at 0.855v with a 20mv hysteresis. the uvlo feature monitors the input voltage and inhibits the switching cycle controls from initiating switching cycles if the v in is too low. this ensures no switching currents are drawn from the input to collapse the voltage at the terminals of the battery when the internal resistance of the battery is high . figure 1 displays the uvlo fea ture for the ts3310. applications information inductor selection when selecting an inductor value, the value should be chosen based on output current requirements . if the input source is a small battery, make sure the choice of the inductor value considers the maximum input current that the source battery can support (based on series resistance). for example, some small button cell batteries can exhibit 5 series resistance, therefore a 20ma maximum input current may be appropriate (100mv drop). consider using a large store capacitor to support peak loads for small bat teries C see section bursted load with big store buffer cap acitor . a low esr , shielded inductor is recommended. depending upon the application, the inductor value will vary. for applications with load current s less than a few milliamperes, a 100h inductor is recommended. as shown in the efficie ncy curves on p ages 4 and 5, the effi ciency is greater with a larger inductor value for smaller load currents . please refer to the two maximum store current vs input voltage graphs found on p age 9. circuit a which uses a 10h inductor is able to source larger load currents than that of circ uit b with a 100h inductor due to the larger peak currents . expected maximum store output current inductor value - h 1 10 100 1000 maximum store current - ma 100 10 1 0.1 figure 2 . expected maximum store output current with 85% efficiency vs inductor value v store /v in = 1 v store /v in = 2 v store /v in = 3 v store /v in = 4 figure 3 . i in(avg,max) vs inductor value maximum input current from source vs inductor value inductor value - h 1 10 100 1000 maximum avg input current - ma 1000 100 10 1 lsw 2v/div store 2 v/div in 1v /div i l 20ma/div figure 1 . ts3310 , uvlo=0.855v uvlo : circuit b with r in =50 v in =1.2v, store=3 v, i store = 0. 3 a ts3310 page 16 ts3310ds r1p1 rtfds the chosen inductors saturation current for a specific inductor value should be at least 50% greater than the peak inductor curre nt value displayed in figure 4 entitled inductor current handling requirements . table 2 provides a list of some inductor ma nufacturers. table s 3 and 4 show some example inductors for values of 10h and 100h that may be used for circuit a or b. the table s include the inductors r dc (inductor series dc resistance or esr ), saturation current, and dimensions . as mentioned previously , the inductors saturation current should always be greater than 150% of the peak inductor current; therefo re the appropriate size and efficiency ( dependent upon esr ) may be chosen based on the applications requirements. input and store capacitor selection c eramic capacitor s are recommended for c in and c store due to ceramics extremely low leakage currents (generally limited by very high insulation resistance) . larger value ceramics (10f or greater) may use high constant dielectric materials, such as x5r, x7r, and y5v. these materials exhibit a strong voltage coefficient and exhibit substantially lower capacitance than rated when operated near the maximum specified voltage. for these types of capacitors, use 10v and 16v voltage ratings. inductor current handling requirement inductor value - h 1 10 100 1000 peak inductor current - ma 10000 1000 100 10 1 figure 4 . inductor peak current vs inductor value inductors taiyo yuden www.t - yuden.com murata www.murata.com coilcraft www.coilcraft.com sumida www.sumida.com table 2 . inductor manufacturers inductor value p/n inductor series r dc saturation current (lxwxh) (mm ) 10h lqh32cn100k33 lqh 32c_33 0.3 450ma 3.2x2.5x2.0 10h lqh32cn100k53 lqh 32c_53 0.3 450ma 3.2x2.5x1.55 10h lqh43cn100k03 lqh 43c 0.24 650ma 4.5x3.6x2.6 100h lqh32cn101k23 lqh 32c_ 2 3 3.5 100ma 3.2x2.5x2.0 100h lqh32cn101k53 lqh 32c_53 3.5 100ma 3.2x2.5x1.55 100h lqh43cn101k03 lqh 43c 2.2 190ma 4.5x3.6x2.8 table 4 . murata example inductors inductor value p/n inductor type r dc saturation current (lxwxh) (mm) 10 h cbc20166t100k cbc 2016 0.82 380ma 2x1.6x1.6 10 h cbc2518t100k cbc 2518 0.36 480ma 2.5x1.8x1.8 10 h cbc3225t100kr cbc 3225 0.133 900ma 3.2x2.5x2.5 100 h cb2016t101k cb 2016 4.5 70ma 2x1.6x1.6 100 h cb2518t101k cb 2518 2.1 60ma 2.5x1.8x1.8 100 h cbc2518t101k cbc 2518 3.7 160ma 2.5x1.8x1.8 100 h cbc3225t101kr cbc 3225 1.4 270ma 3.2x2.5x2.5 table 3 . taiyo - yuden example inductors ts3310 ts3310ds r1p1 page 17 rtfds the store voltage output ripple can be reduced by increasing the value of c store . figure 5 displays the store output voltage ripple for two different storage capacitor values. the output voltage ripple reaches a floor value when the internal voltage comparator hysteresis becomes the dominant so urce of ripple. below this level, larger capacitance does not help reduce the ripple. burst ed load with big store buffer capacitor the ts3310 provides a switched out output that is capable of sourcing short bursts of large output current by utilizing a large storage capacit or at the store output. figure 6 displays an application circuit that utilizes this functionality. the circuit is powered from a lr44 1.5v coin cell battery. in this example , t he load needs to be powered on once every 20 seconds for 200sec periods. the load requires a 3.3v source and demands 100ma current when it is powered on. also in this example, the load continues to consume 10a of leakage current when off . by attaching the load to out when the load isnt u sed , the ts3310 isolates the 10a current so that overall quiescent current can be maintained . a 220f storage capacitor is used for c store so that it can store the necessary charge to supply the 100ma load current. the microcontroller brings the instant - o n load switch, out_on, high when the load needs to be powered on. the ts3310 on average consumes 160na between load bursts. to prevent the circuit from over loading the lr44 coin cell battery, a 100h inductor is used to ensure the ts3310 only dra ws 10 ma o f current on average while recharging c store after the load is powered off. after the load has been powered off, the ts3310 recharges the 220f c store capacitor within 6msec and is ready for the next bursted cycle. figure 7 displays the load being powered on for a 200sec period and the recharge of the 220f c store within 6msec. figure 6 . bursted load application circuit out 2 v/div store 200m v/div out_on 5v/div i l 2 0ma/div bursted - load with big store buffer capacitor l=100 h,c out =0.1 f c in =1 f, c store =220 f v in =1.2v, store=3 .3 v, i out =100ma figure 7 . 220 f c store recovery scope capture store c store =33 f 10 0mv/div store c store =10 f 100mv/div figure 5 . output voltage ripple comparison store output voltage ripple l=10 h, c in =10 f v in =1.2v, store=3v, i store =0.3 a ts3310 page 18 touchstone semiconductor, inc. ts3310ds r1p1 630 alder drive, milpitas, ca 95035 rtfds +1 (408) 215 C 1220 ? www.touchstonesemi.com package outline drawing information furnished by touchstone semiconductor is believed to be accurate and reliable. however, touchstone semiconductor does not assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result f rom its u se , and all information provided by touchstone semiconductor and its suppliers is provided on an as is basis, without warranty of any kin d . touchstone semiconductor reserves the right to change product specifications and product descriptions at any time wi thout any advance notice. no license is granted by implication or otherwise under any patent or patent rights of touchstone semiconductor. touchstone semiconductor assumes no liability for applications assistance or customer product design. customers are r esponsible for their products and applications using touchstone semiconductor components. to minimize the risk associated with customer products and applicatio ns, customers should provide adequate design and operating safeguards. trademarks and registered trademarks are the property of their respective owners. 0 . 2 0 0 0 . 0 5 0 b o t t o m v i e w 2 . 0 0 0 0 . 0 5 0 2 . 0 0 0 0 . 0 5 0 t o p v i e w 1 0 l ( 2 x 2 m m ) p i n 1 d o t b y m a r k i n g p i n # 1 i d e n t i f i c a t i o n 0 . 2 0 3 r e f a 0 . 0 0 0 - 0 . 0 5 0 n o t e ! a l l d i m e n s i o n s i n m m . t h i s p a r t i s c o m p l i a n t w i t h j e d e c m o - 2 2 9 s p e c a m a x . n o m . m i n . 0 . 8 0 0 0 . 7 5 0 0 . 7 0 0 s i d e v i e w 0 . 9 0 0 0 . 0 5 0 e x p . d a p 1 . 4 0 0 0 . 0 5 0 e x p . d a p 0 . 3 0 0 0 . 0 5 0 0 . 4 0 0 b s c |
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